The present disclosure relates to a technology of reducing power consumption of a semiconductor integrated circuit.
As a technology of reducing power consumption of a semiconductor integrated circuit, power gating has been known. Power gating is a technology in which power supply to a circuit portion that is not in operation in the semiconductor integrated circuit is cut off to achieve reduction in leak current.
In U.S. Pat. No. 9,329,669, a configuration in which power gating switches used for performing power cutoff in each circuit portion are connected in series and sleep signals that control power cutoff are sequentially transmitted is described.